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Akihiko Oginuma

Agilent Technologies

Books of this author



Articles of this author


Speed up your design verification process with frequency domain clock jitter analysis

Issue: KIPiS 2008 #4

 
Speed up your design verification process with frequency domain clock jitter analysis

Issue: KIPiS 2008 #4

The author reviews the role of reference clock and the effects of clock jitter on data jitter, and discusses a new measurement technique equipped with the Agilent E5001A Precision Clock Jitter Analysis Application running on the E5052B Signal Source Analyzer (SSA) that delivers unprecedented capabilities, ultra-low random jitter (RJ) measurement and real-time jitter spectrum analysis on both RJ and periodic jitter (PJ) components, allowing you to improve your design quality

 

Current issue
#3 June 2018
KIPiS 2018 #3
Topic of the issue:
Metrology
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